Near field communication (NFC) is a standards-based communication technology which enables communication between different electronic devices over a short-range distance, ranging from direct contact to a few centimeters. Devices equipped with NFC can make transactions and transmit and receive digital content simply and quickly, without requiring pairing codes or searching for wireless networks. NFC has already been implemented in Android-supported smart phones and tablets, credit cards and transportation systems, and even has the potential to replace passports in the future.
Please refer to FIG. 1, which is a diagram of an integrated circuit (IC) 100 which uses NFC technology. As illustrated in the diagram, the IC 100 is coupled to a PC/phone host 150. The integrated circuit 100 comprises a BB modem 110, which contains a power estimation Fast Fourier Transform (FFT) circuit 103, a digital FE circuit 105 and a CW/modulated circuit 107. A first analog-to-digital converter (ADC) 113 and a second ADC 115 are coupled to the BB modem 110. These ADCs are coupled to an Rx path, wherein both the Rx path and Tx path are coupled to an antenna network 160 which includes external matching components and an NFC antenna 130. The Rx path consists of a series of high and low pass filters coupled between a multiplier and a programmable-gain amplifier. The TX path consists of Modulator and PA Driver 190 that transmits the signal to the antenna via the external matching network. The IC 100 further comprises a crystal oscillator 120, coupled to a MUX 125, the output of which is coupled to a load modulator 140, which is in turn coupled across the NFC antenna 130. The output of the MUX 125 is inputted to a Modulator and PA driver 190, which receives data to be transmitted from the BB modem 110 and provides the data to the antenna network 160. The load modulator 140 is also coupled to an RF limiter 145, an incoming field detector 155, a full wave rectifier (FWR) 165, and a regulator 170. Finally, a clock recovery circuit 175 and a field detector 180 are coupled to the antenna network 160. Please note that other circuit elements are illustrated in FIG. 1 for completeness, but are not essential to the method of the present invention and have not been designated with a numeral. Those skilled in the art will be familiar with the particular operations of these circuit elements, and they are therefore not detailed herein.
Conventional testing methods for ICs such as that illustrated in FIG. 1 use an off-chip tester circuit (not shown) to generate the testing signals. A first signal is generated by the tester circuit and passed to the IC. The IC 100 modulates this first signal to generate a modulated first signal which is transmitted via the Tx path to the antenna 130. The antenna 130 then sends the modulated first signal back via the Rx path as a second modulated signal. The IC 100 demodulates the second modulated signal to generate a second signal, which is passed to the tester circuit. By comparing the first signal with the second signal, the tester circuit can determine whether the IC passes or fails.
The above method, however, is unable to test functionality of other blocks of the IC 100, such as the clock recovery circuit 175 and full wave rectifier 165, etc. Even though the Tx path and Rx path may function correctly, other functional blocks may be defective, which means the IC 100 will still not work as intended. Further, the prior art method requires an off-chip tester circuit for generating and comparing the first signal and second signal.